Resume

Education

Experience

Skills

Courses

References


PDF Version

Education

Experience

Tesla Inc. - Senior Silicon Design Engineer

February 2024 - Present | Palo Alto California, USA

  • Innovated and developed the proprietary Tesla Transport Protocol (TTP) over Layer 3—an advanced congestion-aware communication protocol that achieved unprecedented low-latency and high-throughput data movement across DOJO's fabric, resulting in significant performance improvements
  • Distinguished technical achievement recognized through presentation at Stanford's prestigious Hot Chips 2024 conference and granted patent, demonstrating exceptional contributions to protocol architecture and silicon integration
  • Spearheaded design of cutting-edge high-density compute cluster architecture, successfully integrating custom Network Interface Controllers (NICs) and specialized hardware to enable TTP-based communication across DOJO nodes
  • Worked with cross-functional collaboration between silicon, networking, and system teams to optimize fabric-level performance, resulting in breakthrough improvements in data flow efficiency and scalability for large-scale neural network training

Tesla Inc. - DOJO Hardware Engineering

July 2022 - February 2024 | Palo Alto California, USA

  • Designed, managed, tested and integrated a custom NIC with PCIe, DDR and 100G QSFP for interfacing with our proprietary network protocol, TTP presented at HotChips September 2024
  • Monitored and enhanced the efficiency of a product production line through the implementation of quality improvements, in addition to constructing automated end-of-line testers to augment throughput significantly
  • Developed RTL, C++ drivers and nodejs backend to improve hardware tracking and logging across our system
  • Authored RTL to transform an I2C slave into an AXI master, enabling the onboard micro-controller to access the internal register bus and data bus, thereby expanding system capabilities.
  • Solely design and wrote automated production scale provisioning and test software for silicon
  • Successfully brought up and debugged an advanced fabric interfacing card equipped with sophisticated SERDES for ultra-high-speed 50Gb/s per channel communication as well as 100G QSFP

Tesla Inc. - DOJO Hardware Engineering Intern

August 2021 - December 2021 | Palo Alto California, USA

  • Tested high-speed interface cards for mesh network and fabric communication containing 100G QSFP and high speed SERDES interfaces achieving TB/s throughput, alongside high-density power supply units
  • Engineered a super capacitor hot swap controller, enabling seamless hardware insertion into a live cabinet, thus promoting operational convenience and safety
  • Brought up Tesla's first generated DOJO cabinet with compute nodes and power supply units
  • Effectively tested and integrated a large, complex system comprising intricate harnessing, control systems, and high-power delivery, ensuring overall system coherence and performance

Tesla Inc. - Autopilot Hardware Engineering Intern

January 2021 - May 2021 | Palo Alto California, USA

  • Wrote hardware validation testing suites for the team including Ethernet Switch, GPS, VRM bringup in Python to reduce repetitive tasks and build software infrastructure
  • Identified, investigated, and rectified reliability issues prevalent on the AutoPilot board in temperature-varying environments, enhancing overall system robustness
  • Performed time-domain reflectometry on SGMII and 1000Base-T1 signal paths to verify signal integrity and performed eye-diagram analysis for intersymbol distortion
  • Validated multi-phase buck converter load transient step response and open-loop phase response; meeting requirements

University of Waterloo - Undergraduate Research Assistant

April 2020 - August 2020 | Waterloo Ontario, Canada

  • Engineered a digital signal processing 60GHz mmWave radar system specifically for non-contact vital sign detection, pushing the boundaries of health technology tracking patients in hospitals
  • Devised a sophisticated algorithm utilizing digital signal processing, wavelet transformation, and auto-correlation, proficient in detecting breath rates at distances of up to 10 meters, showcasing innovation in remote vital sign detection
  • Established a client-server architecture in Python and C++, designed to seamlessly offload processing in real-time, thereby enhancing system performance and efficiency

Kazoo Technology - Electronics Designer and Innovator Intern

August 2019 - April 2020 | Hong Kong, Hong Kong

  • Leveraged fundamental engineering principles and the scientific method to reverse engineer capacitive touchscreen stylus hardware. Successfully devised and validated theories through comprehensive simulations, verified by the construction of a hardware prototype
  • Reversed engineered capacitive touch screen stylus hardware to adapt technology to special use case
  • Designed both discrete and integrated analog amplifiers as well as digitally controlled filters, leveraging LTSpice simulations and progressing to building and testing physical prototypes.
  • Designed 200MSP/s ADC with FPGA dev-board in Altium including touch screen protocol detection and spoofing for mimic touch screen touching as well to provide geometry that the touch device and detect

AR Modular RF - Radio Frequency Hardware Engineering Intern

January 2019 - April 2019 | Seattle Washington, USA

  • Developed and implemented automated RF amplifier testing infrastructure using LabView and Python, significantly reducing test cycle times and improving measurement consistency
  • Architected and deployed a scalable MAC address management system for IP-enabled products, including firmware flashing automation and database tracking
  • Characterized RF products to convey technical specs and information to the marketing department and datasheets

Evertz Microsystems - Systems Engineering Intern

May 2018 - August 2018 | Burlington Ontario, Canada

  • Executed research and deployed strategies for impedance and phase matching of 25G QSFP differential pairs, significantly enhancing signal integrity
  • Successfully captured schematics for an Ethernet switch encompassing RGMII, 1000BTX, and SGMII, including the incorporation of magnetics and impedance matching for optimal performance
  • Engineered specialized firmware to identify incoming video encryption streams, further enhancing user interaction

Evertz Microsystems - Systems Engineering Intern

September 2017 - December 2017 | Burlington Ontario, Canada

  • Developed FPGA firmware for capturing and replaying 10GB/s fiber optic layer 2 ethernet packets with realtime hardware time stamping for replaying at a different time for testing purposes
  • Designed and implemented a DDR3 circular buffering system, implemented pre-fetching and caching, while also supporting DMA to DDR3, allowing generation of Wireshark files from Ethernet captured frames
  • Troubleshot hardware short-circuits on high-density PCBs and spearheaded the design of a more robust active fusing system to safeguard boards against potential damage

Dozr - Fullstack Software Engineering

January 2017 - April 2017 | Kitchener Ontario, Canada

  • Developed React components utilizing advanced state management patterns and custom hooks, significantly improving website UI, and internal tooling for managing user data
  • Built and optimized a distributed web crawling system using Node.js and Python, implementing intelligent rate limiting and parallel processing

Skills

Note: I think these sections are silly, but everyone seems to have one. Here is a *mostly* honest overview of my skills.

Altium Designer
5 / 5
Python
5 / 5
Ansys HFSS
4 / 5
LTSpice
4 / 5
Vivado
4 / 5
JavaScript
4 / 5
Solidity
4 / 5
TypeScript
4 / 5
VHDL
4 / 5
Verilog
4 / 5
Quartus
3 / 5
Bash
3 / 5
C
3 / 5
C++
3 / 5
Java
3 / 5
LabView
3 / 5
MatLab
3 / 5
PHP
2 / 5

Selected Courses

References are available upon request